lab3_impl

CMakeLists.txt

@@ -39,6 +39,7 @@ INCLUDE_DIRECTORIES(
     include/cminusfc
     include/common
     include/lightir
+    include/codegen
     ${LLVM_INCLUDE_DIRS}
 )
 

include/codegen/ASMInstruction.hpp

+#pragma once
+
+#include <cassert>
+#include <string>
+
+struct ASMInstruction {
+    enum InstType { Instruction, Atrribute, Label, Comment } type;
+    std::string content;
+
+    explicit ASMInstruction(std::string s, InstType ty = Instruction)
+        : type(ty), content(s) {}
+
+    std::string format() const {
+        switch (type) {
+        case ASMInstruction::Instruction:
+        case ASMInstruction::Atrribute:
+            return "\t" + content + "\n";
+        case ASMInstruction::Label:
+            return content + ":\n";
+        case ASMInstruction::Comment:
+            return "# " + content + "\n";
+        }
+        assert(false && "unreachable");
+    }
+};

include/codegen/CodeGen.hpp

+#pragma once
+
+#include "ASMInstruction.hpp"
+#include "Module.hpp"
+#include "Register.hpp"
+
+class CodeGen {
+  public:
+    explicit CodeGen(Module *module) : m(module) {}
+
+    std::string print() const;
+
+    void run();
+
+    template <class... Args> void append_inst(Args... arg) {
+        output.emplace_back(arg...);
+    }
+
+    void
+    append_inst(const char *inst, std::initializer_list<std::string> args,
+                ASMInstruction::InstType ty = ASMInstruction::Instruction) {
+        auto content = std::string(inst) + " ";
+        for (const auto &arg : args) {
+            content += arg + ", ";
+        }
+        content.pop_back();
+        content.pop_back();
+        output.emplace_back(content, ty);
+    }
+
+  private:
+    void allocate();
+    void copy_stmt(); // for phi copy
+
+    // 向寄存器中装载数据
+    void load_to_greg(Value *, const Reg &);
+    void load_to_freg(Value *, const FReg &);
+    void load_from_stack_to_greg(Value *, const Reg &);
+
+    // 向寄存器中加载立即数
+    void load_large_int32(int32_t, const Reg &);
+    void load_large_int64(int64_t, const Reg &);
+    void load_float_imm(float, const FReg &);
+
+    // 将寄存器中的数据保存回栈上
+    void store_from_greg(Value *, const Reg &);
+    void store_from_freg(Value *, const FReg &);
+
+    void gen_prologue();
+    void gen_ret();
+    void gen_br();
+    void gen_binary();
+    void gen_float_binary();
+    void gen_alloca();
+    void gen_load();
+    void gen_store();
+    void gen_icmp();
+    void gen_fcmp();
+    void gen_zext();
+    void gen_call();
+    void gen_gep();
+    void gen_sitofp();
+    void gen_fptosi();
+    void gen_epilogue();
+
+    static std::string label_name(BasicBlock *bb) {
+        return "." + bb->get_parent()->get_name() + "_" + bb->get_name();
+    }
+
+    static std::string func_exit_label_name(Function *func) {
+        return func->get_name() + "_exit";
+    }
+
+    static std::string fcmp_label_name(BasicBlock *bb, unsigned cnt) {
+        return label_name(bb) + "_fcmp_" + std::to_string(cnt);
+    }
+
+    struct {
+        /* 随着ir遍历设置 */
+        Function *func{nullptr};    // 当前函数
+        BasicBlock *bb{nullptr};    // 当前基本块
+        Instruction *inst{nullptr}; // 当前指令
+        /* 在allocate()中设置 */
+        unsigned frame_size{0}; // 当前函数的栈帧大小
+        std::unordered_map<Value *, int> offset_map{}; // 指针相对 fp 的偏移
+        unsigned fcmp_cnt{0}; // fcmp 的计数器, 用于创建 fcmp 需要的 label
+
+        void clear() {
+            func = nullptr;
+            bb = nullptr;
+            inst = nullptr;
+            frame_size = 0;
+            fcmp_cnt = 0;
+            offset_map.clear();
+        }
+
+    } context;
+
+    Module *m;
+    std::list<ASMInstruction> output;
+};

include/codegen/CodeGenUtil.hpp

+#pragma once
+
+#include <stdexcept>
+
+/* 关于位宽 */
+#define IMM_12_MAX 0x7FF
+#define IMM_12_MIN -0x800
+
+#define LOW_12_MASK 0x00000FFF
+#define LOW_20_MASK 0x000FFFFF
+#define LOW_32_MASK 0xFFFFFFFF
+
+inline unsigned ALIGN(unsigned x, unsigned alignment) {
+    return ((x + (alignment - 1)) & ~(alignment - 1));
+}
+
+inline bool IS_IMM_12(int x) { return x <= IMM_12_MAX and x >= IMM_12_MIN; }
+
+/* 栈帧相关 */
+#define PROLOGUE_OFFSET_BASE 16 // $ra $fp
+#define PROLOGUE_ALIGN 16
+
+/* 龙芯指令 */
+// Arithmetic
+#define ADD "add"
+#define SUB "sub"
+#define MUL "mul"
+#define DIV "div"
+
+#define ADDI "addi"
+
+#define FADD "fadd"
+#define FSUB "fsub"
+#define FMUL "fmul"
+#define FDIV "fdiv"
+
+#define ORI "ori"
+
+#define LU12I_W "lu12i.w"
+#define LU32I_D "lu32i.d"
+#define LU52I_D "lu52i.d"
+
+// Data transfer (greg <-> freg)
+#define GR2FR "movgr2fr"
+#define FR2GR "movfr2gr"
+
+// Memory access
+#define LOAD "ld"
+#define STORE "st"
+#define FLOAD "fld"
+#define FSTORE "fst"
+
+#define BYTE ".b"
+#define HALF_WORD ".h"
+#define WORD ".w"
+#define DOUBLE ".d"
+
+#define SINGLE ".s" // float
+#define LONG ".l"
+
+// ASM syntax sugar
+#define LOAD_ADDR "la.local"
+
+// errors
+class not_implemented_error : public std::logic_error {
+  public:
+    explicit not_implemented_error(std::string &&err_msg = "")
+        : std::logic_error(err_msg){};
+};
+
+class unreachable_error : public std::logic_error {
+  public:
+    explicit unreachable_error(std::string &&err_msg = "")
+        : std::logic_error(err_msg){};
+};

include/codegen/Register.hpp

+#pragma once
+
+#include <cassert>
+#include <string>
+
+/* General-purpose Register Convention:
+ * Name         Alias       Meaning
+ * $r0          $zero       constant 0
+ * $r1          $ra         return address
+ * $r2          $tp         thread pointer
+ * $r3          $sp         stack pointer
+ * $r4 - $r5    $a0 - $a1   argument, return value
+ * $r6 - $r11   $a2 - $a7   argument
+ * $r12 - $r20  $t0 - $t8   temporary
+ * $r21                     saved
+ * $r22         $fp / $s9   frame pointer
+ * $r23 - $r31  $s0 - $s8   static
+ *
+ * Floating-point Register Convention
+ * Name	        Alias	    Meaning
+ * $f0-$f1      $fa0-$fa1   argument/return value
+ * $f2-$f7      $fa2-$fa7   argument
+ * $f8-$f23     $ft0-$ft15  temporary
+ * $f24-$f31    $fs0-$fs7   static
+ */
+
+struct Reg {
+    unsigned id;
+
+    explicit Reg(unsigned i) : id(i) { assert(i <= 31); }
+    bool operator==(const Reg &other) { return id == other.id; }
+
+    std::string print() const;
+
+    static Reg zero() { return Reg(0); }
+    static Reg ra() { return Reg(1); }
+    static Reg sp() { return Reg(3); }
+    static Reg fp() { return Reg(22); }
+    static Reg a(unsigned i) {
+        assert(0 <= i and i <= 7);
+        return Reg(i + 4);
+    }
+    static Reg t(unsigned i) {
+        assert(0 <= i and i <= 8);
+        return Reg(i + 12);
+    }
+    static Reg s(unsigned i) {
+        assert(0 <= i and i <= 9);
+        if (i == 9)
+            return Reg(22);
+        else
+            return Reg(i + 23);
+    }
+};
+
+struct FReg {
+    unsigned id;
+
+    explicit FReg(unsigned i) : id(i) { assert(i <= 31); }
+    bool operator==(const FReg &other) { return id == other.id; }
+
+    std::string print() const;
+
+    static FReg fa(unsigned i) {
+        assert(0 <= i and i <= 7);
+        return FReg(i);
+    }
+    static FReg ft(unsigned i) {
+        assert(0 <= i and i <= 15);
+        return FReg(i + 8);
+    }
+    static FReg fs(unsigned i) {
+        assert(0 <= i and i <= 7);
+        return FReg(i + 24);
+    }
+};
+
+struct CFReg {
+    unsigned id;
+
+    explicit CFReg(unsigned i) : id(i) { assert(i <= 7); }
+    bool operator==(const CFReg &other) { return id == other.id; }
+
+    std::string print() const { return "$fcc" + std::to_string(id); }
+};

src/CMakeLists.txt

@@ -4,3 +4,4 @@ add_subdirectory(logging)
 add_subdirectory(cminusfc)
 add_subdirectory(lightir)
 add_subdirectory(io)
+add_subdirectory(codegen)
\ No newline at end of file

src/cminusfc/CMakeLists.txt

@@ -9,6 +9,7 @@ target_link_libraries(
     IR_lib
     common
     syntax
+    codegen
     stdc++fs
 )
 

src/cminusfc/main.cpp

 #include "Module.hpp"
 #include "ast.hpp"
 #include "cminusf_builder.hpp"
+#include "CodeGen.hpp"
 
 #include <filesystem>
 #include <fstream>
@@ -16,6 +17,7 @@ struct Config {
     std::filesystem::path output_file;
 
     bool emitast{false};
+    bool emitasm{false};
     bool emitllvm{false};
 
     Config(int argc, char **argv) : argc(argc), argv(argv) {
@@ -55,9 +57,13 @@ int main(int argc, char **argv) {
             output_stream << "; ModuleID = 'cminus'\n";
             output_stream << "source_filename = " << abs_path << "\n\n";
             output_stream << m->print();
+        } else if (config.emitasm) {
+            CodeGen codegen(m.get());
+            codegen.run();
+            output_stream << codegen.print();
         }
 
-        // TODO: lab3 lab4 (IR optimization or codegen)
+        // TODO: lab4 (IR optimization or codegen)
     }
 
     return 0;
@@ -77,6 +83,8 @@ void Config::parse_cmd_line() {
             }
         } else if (argv[i] == "-emit-ast"s) {
             emitast = true;
+        } else if (argv[i] == "-S"s) {
+            emitasm = true;
         } else if (argv[i] == "-emit-llvm"s) {
             emitllvm = true;
         } else {
@@ -105,7 +113,7 @@ void Config::check() {
 
 void Config::print_help() const {
     std::cout << "Usage: " << exe_name
-              << " [-h|--help] [-o <target-file>] [-mem2reg] [-emit-llvm] [-S] "
+              << " [-h|--help] [-o <target-file>] [-emit-ast] [-emit-llvm] [-S] "
                  "<input-file>"
               << std::endl;
     exit(0);

src/codegen/CMakeLists.txt

+add_library(
+    codegen STATIC
+    CodeGen.cpp
+    Register.cpp
+)
+
+target_link_libraries(codegen common IR_lib)

src/codegen/Register.cpp

+#include "Register.hpp"
+#include <string>
+
+std::string Reg::print() const {
+    if (id == 0) {
+        return "$zero";
+    }
+    if (id == 1) {
+        return "$ra";
+    }
+    if (id == 2) {
+        return "$tp";
+    }
+    if (id == 3) {
+        return "$sp";
+    }
+    if (4 <= id and id <= 11) {
+        return "$a" + std::to_string(id - 4);
+    }
+    if (12 <= id and id <= 20) {
+        return "$t" + std::to_string(id - 12);
+    }
+    if (id == 22) {
+        return "$fp";
+    }
+    assert(false);
+}
+
+std::string FReg::print() const {
+
+    if (0 <= id and id <= 7) {
+        return "$fa" + std::to_string(id);
+    }
+    if (8 <= id and id <= 23) {
+        return "$ft" + std::to_string(id - 8);
+    }
+    if (24 <= id and id <= 31) {
+        return "$fs" + std::to_string(id - 24);
+    }
+    assert(false);
+}

tests/3-codegen/autogen/cleanup.sh

+#!/bin/bash
+rm -rf output log.txt

tests/3-codegen/autogen/eval_lab3.sh

+#!/bin/bash
+
+project_dir=$(realpath ../../../)
+io_dir=$(realpath "$project_dir"/src/io)
+output_dir=output
+suffix=cminus
+
+LOG=log.txt
+
+usage() {
+	cat <<JIANMU
+Usage: $0 [path-to-testcases] [type]
+path-to-testcases: './testcases' or '../../testcases_general' or 'self made cases'
+type: 'debug' or 'test', debug will output .ll file
+JIANMU
+	exit 0
+}
+
+check_return_value() {
+	rv=$1
+	expected_rv=$2
+	fail_msg=$3
+	detail=$4
+	if [ "$rv" -eq "$expected_rv" ]; then
+		return 0
+	else
+		printf "\033[1;31m%s: \033[0m%s\n" "$fail_msg" "$detail"
+		return 1
+	fi
+}
+
+# check arguments
+[ $# -lt 2 ] && usage
+if [ "$2" == "debug" ]; then
+	debug_mode=true
+elif [ "$2" == "test" ]; then
+	debug_mode=false
+else
+	usage
+fi
+
+test_dir=$1
+testcases=$(ls "$test_dir"/*."$suffix" | sort -V)
+check_return_value $? 0 "PATH" "unable to access to '$test_dir'" || exit 1
+
+# hide stderr in the script
+# exec 2>/dev/null
+
+mkdir -p $output_dir
+
+truncate -s 0 $LOG
+
+if [ $debug_mode = false ]; then
+	exec 3>/dev/null 4>&1 5>&2 1>&3 2>&3
+else
+	exec 3>&1
+fi
+
+if [ $debug_mode = false ]; then
+	exec 1>&4 2>&5
+fi
+
+echo "[info] Start testing, using testcase dir: $test_dir"
+# asm
+for case in $testcases; do
+	echo "==========$case==========" >>$LOG
+	case_base_name=$(basename -s .$suffix "$case")
+	std_out_file=$test_dir/$case_base_name.out
+	in_file=$test_dir/$case_base_name.in
+	asm_file=$output_dir/$case_base_name.s
+	exe_file=$output_dir/$case_base_name
+	out_file=$output_dir/$case_base_name.out
+	ll_file=$output_dir/$case_base_name.ll
+
+	echo -n "$case_base_name..."
+	# if debug mode on, generate .ll also
+	if [ $debug_mode = true ]; then
+		bash -c "${project_dir}/build/cminusfc -emit-llvm $case -o $ll_file" >>$LOG 2>&1
+	fi
+	# cminusfc compile to .s
+	bash -c "${project_dir}/build/cminusfc -S $case -o $asm_file" >>$LOG 2>&1
+	check_return_value $? 0 "CE" "cminusfc compiler error" || continue
+
+	# gcc compile asm to executable
+	loongarch64-unknown-linux-gnu-gcc -static \
+		"$asm_file" "$io_dir"/io.c -o "$exe_file" \
+		>>$LOG
+	check_return_value $? 0 "CE" "gcc compiler error" || continue
+
+	# qemu run
+	if [ -e "$in_file" ]; then
+		exec_cmd="qemu-loongarch64 $exe_file >$out_file <$in_file"
+	else
+		exec_cmd="qemu-loongarch64 $exe_file >$out_file"
+	fi
+	bash -c "$exec_cmd"
+	ret=$?
+	# remove trailing null byte in the end line
+	sed -i "\$s/\x00*$//" "$out_file"
+	# append return value
+	echo $ret >>"$out_file"
+
+	# compare output
+	diff --strip-trailing-cr "$std_out_file" "$out_file" -y >>$LOG
+	check_return_value $? 0 "WA" "output differ, check $std_out_file and $out_file" || continue
+
+	# ok
+	printf "\033[1;32mOK\033[0m\n"
+done

tests/3-codegen/autogen/log.txt

+==========../../testcases_general//1-return.cminus==========
+0								0
+==========../../testcases_general//2-decl_int.cminus==========
+0								0
+==========../../testcases_general//3-decl_float.cminus==========
+0								0
+==========../../testcases_general//4-decl_int_array.cminus==========
+0								0
+==========../../testcases_general//5-decl_float_array.cminus==========
+0								0
+==========../../testcases_general//6-num_add_int.cminus==========
+210								210
+==========../../testcases_general//7-assign_int_var_local.cminus==========
+210								210
+==========../../testcases_general//8-assign_int_array_local.cminus==========
+210								210
+==========../../testcases_general//9-assign_cast.cminus==========
+5								5
+==========../../testcases_general//10-funcall.cminus==========
+0								0
+==========../../testcases_general//11-funcall_chain.cminus==========
+210								210
+==========../../testcases_general//12-funcall_recursion.cminus==========
+0								0
+==========../../testcases_general//13-if_stmt.cminus==========
+0								0
+==========../../testcases_general//14-while_stmt.cminus==========
+0								0
+==========../../testcases_general//15-if_while.cminus==========
+45								45
+==========../../testcases_general//16-if_chain.cminus==========
+3								3
+==========../../testcases_general//17-while_chain.cminus==========
+0								0
+==========../../testcases_general//18-global_var.cminus==========
+10								10
+==========../../testcases_general//19-global_local_var.cminus==========
+20								20
+==========../../testcases_general//20-gcd_array.cminus==========
+18								18
+==========../../testcases_general//21-comment.cminus==========
+0								0

tests/3-codegen/autogen/output/0-io.ll

+; ModuleID = 'cminus'
+source_filename = "/code/compiler/24.ta/tests/3-codegen/autogen/testcases/0-io.cminus"
+
+declare i32 @input()
+
+declare void @output(i32)
+
+declare void @outputFloat(float)
+
+declare void @neg_idx_except()
+
+define i32 @main() {
+label_entry:
+  %op0 = call i32 @input()
+  call void @output(i32 %op0)
+  ret i32 0
+}

tests/3-codegen/autogen/output/0-io.out

+1234
+0

tests/3-codegen/autogen/output/0-io.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -32
+.main_label_entry:
+# %op0 = call i32 @input()
+	bl input
+	st.w $a0, $fp, -20
+# call void @output(i32 %op0)
+	ld.w $a0, $fp, -20
+	bl output
+# ret i32 0
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 32
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/1-return.ll

+; ModuleID = 'cminus'
+source_filename = "/code/compiler/24.ta/tests/3-codegen/autogen/testcases/1-return.cminus"
+
+declare i32 @input()
+
+declare void @output(i32)
+
+declare void @outputFloat(float)
+
+declare void @neg_idx_except()
+
+define i32 @main() {
+label_entry:
+  call void @output(i32 111)
+  ret i32 111
+}

tests/3-codegen/autogen/output/1-return.out

+0

tests/3-codegen/autogen/output/1-return.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -16
+.main_label_entry:
+# ret void
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 16
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/10-float.ll

+; ModuleID = 'cminus'
+source_filename = "/code/compiler/24.ta/tests/3-codegen/autogen/testcases/10-float.cminus"
+
+declare i32 @input()
+
+declare void @output(i32)
+
+declare void @outputFloat(float)
+
+declare void @neg_idx_except()
+
+define i32 @main() {
+label_entry:
+  %op0 = alloca float
+  %op1 = alloca float
+  %op2 = alloca float
+  store float 0x3ff19999a0000000, float* %op0
+  store float 0x3ff8000000000000, float* %op1
+  store float 0x3ff3333340000000, float* %op2
+  %op3 = load float, float* %op0
+  %op4 = load float, float* %op1
+  %op5 = fmul float %op3, %op4
+  %op6 = load float, float* %op2
+  %op7 = fadd float %op5, %op6
+  call void @outputFloat(float %op7)
+  ret i32 0
+}

tests/3-codegen/autogen/output/10-float.out

+2.850000
+0

tests/3-codegen/autogen/output/10-float.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -80
+.main_label_entry:
+# %op0 = alloca float
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# %op1 = alloca float
+	addi.d $t0, $fp, -40
+	st.d $t0, $fp, -36
+# %op2 = alloca float
+	addi.d $t0, $fp, -52
+	st.d $t0, $fp, -48
+# store float 0x3ff19999a0000000, float* %op0
+	ld.d $t0, $fp, -24
+	lu12i.w $t8, 260300
+	ori $t8, $t8, 3277
+	movgr2fr.w $ft0, $t8
+	fst.s $ft0, $t0, 0
+# store float 0x3ff8000000000000, float* %op1
+	ld.d $t0, $fp, -36
+	lu12i.w $t8, 261120
+	ori $t8, $t8, 0
+	movgr2fr.w $ft0, $t8
+	fst.s $ft0, $t0, 0
+# store float 0x3ff3333340000000, float* %op2
+	ld.d $t0, $fp, -48
+	lu12i.w $t8, 260505
+	ori $t8, $t8, 2458
+	movgr2fr.w $ft0, $t8
+	fst.s $ft0, $t0, 0
+# %op3 = load float, float* %op0
+	ld.d $t0, $fp, -24
+	fld.s $ft0, $t0, 0
+	fst.s $ft0, $fp, -56
+# %op4 = load float, float* %op1
+	ld.d $t0, $fp, -36
+	fld.s $ft0, $t0, 0
+	fst.s $ft0, $fp, -60
+# %op5 = fmul float %op3, %op4
+	fld.s $ft0, $fp, -56
+	fld.s $ft1, $fp, -60
+	fmul.s $ft2, $ft0, $ft1
+	fst.s $ft2, $fp, -64
+# %op6 = load float, float* %op2
+	ld.d $t0, $fp, -48
+	fld.s $ft0, $t0, 0
+	fst.s $ft0, $fp, -68
+# %op7 = fadd float %op5, %op6
+	fld.s $ft0, $fp, -64
+	fld.s $ft1, $fp, -68
+	fadd.s $ft2, $ft0, $ft1
+	fst.s $ft2, $fp, -72
+# call void @outputFloat(float %op7)
+	fld.s $fa0, $fp, -72
+	bl outputFloat
+# ret i32 0
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 80
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/10-funcall.out

+0

tests/3-codegen/autogen/output/10-funcall.s

+	.text
+	.globl test
+	.type test, @function
+test:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -32
+	st.w $a0, $fp, -20
+.test_label_entry:
+# %op1 = alloca i32
+	addi.d $t0, $fp, -32
+	st.d $t0, $fp, -28
+# store i32 %arg0, i32* %op1
+	ld.d $t0, $fp, -28
+	ld.w $t1, $fp, -20
+	st.w $t1, $t0, 0
+# ret void
+	addi.w $a0, $zero, 0
+	b test_exit
+test_exit:
+	addi.d $sp, $sp, 32
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -32
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# store i32 10, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 10
+	st.w $t1, $t0, 0
+# %op1 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -32
+# call void @test(i32 %op1)
+	ld.w $a0, $fp, -32
+	bl test
+# ret void
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 32
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/11-floatcall.ll

+; ModuleID = 'cminus'
+source_filename = "/code/compiler/24.ta/tests/3-codegen/autogen/testcases/11-floatcall.cminus"
+
+declare i32 @input()
+
+declare void @output(i32)
+
+declare void @outputFloat(float)
+
+declare void @neg_idx_except()
+
+define float @mod(float %arg0, float %arg1) {
+label_entry:
+  %op2 = alloca float
+  store float %arg0, float* %op2
+  %op3 = alloca float
+  store float %arg1, float* %op3
+  %op4 = alloca i32
+  %op5 = load float, float* %op2
+  %op6 = load float, float* %op3
+  %op7 = fdiv float %op5, %op6
+  %op8 = fptosi float %op7 to i32
+  store i32 %op8, i32* %op4
+  %op9 = load float, float* %op2
+  %op10 = load i32, i32* %op4
+  %op11 = load float, float* %op3
+  %op12 = sitofp i32 %op10 to float
+  %op13 = fmul float %op12, %op11
+  %op14 = fsub float %op9, %op13
+  ret float %op14
+}
+define i32 @main() {
+label_entry:
+  %op0 = alloca float
+  %op1 = alloca float
+  store float 0x4026666660000000, float* %op0
+  store float 0x40019999a0000000, float* %op1
+  %op2 = load float, float* %op0
+  %op3 = load float, float* %op1
+  %op4 = call float @mod(float %op2, float %op3)
+  call void @outputFloat(float %op4)
+  ret i32 0
+}

tests/3-codegen/autogen/output/11-floatcall.out

+0.200000
+0

tests/3-codegen/autogen/output/11-floatcall.s

+	.text
+	.globl mod
+	.type mod, @function
+mod:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -112
+	fst.s $fa0, $fp, -20
+	fst.s $fa1, $fp, -24
+.mod_label_entry:
+# %op2 = alloca float
+	addi.d $t0, $fp, -36
+	st.d $t0, $fp, -32
+# store float %arg0, float* %op2
+	ld.d $t0, $fp, -32
+	fld.s $ft0, $fp, -20
+	fst.s $ft0, $t0, 0
+# %op3 = alloca float
+	addi.d $t0, $fp, -48
+	st.d $t0, $fp, -44
+# store float %arg1, float* %op3
+	ld.d $t0, $fp, -44
+	fld.s $ft0, $fp, -24
+	fst.s $ft0, $t0, 0
+# %op4 = alloca i32
+	addi.d $t0, $fp, -60
+	st.d $t0, $fp, -56
+# %op5 = load float, float* %op2
+	ld.d $t0, $fp, -32
+	fld.s $ft0, $t0, 0
+	fst.s $ft0, $fp, -64
+# %op6 = load float, float* %op3
+	ld.d $t0, $fp, -44
+	fld.s $ft0, $t0, 0
+	fst.s $ft0, $fp, -68
+# %op7 = fdiv float %op5, %op6
+	fld.s $ft0, $fp, -64
+	fld.s $ft1, $fp, -68
+	fdiv.s $ft2, $ft0, $ft1
+	fst.s $ft2, $fp, -72
+# %op8 = fptosi float %op7 to i32
+	fld.s $ft0, $fp, -72
+	ftintrz.w.s $ft0, $ft0
+	movfr2gr.s $t0, $ft0
+	st.w $t0, $fp, -76
+# store i32 %op8, i32* %op4
+	ld.d $t0, $fp, -56
+	ld.w $t1, $fp, -76
+	st.w $t1, $t0, 0
+# %op9 = load float, float* %op2
+	ld.d $t0, $fp, -32
+	fld.s $ft0, $t0, 0
+	fst.s $ft0, $fp, -80
+# %op10 = load i32, i32* %op4
+	ld.d $t0, $fp, -56
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -84
+# %op11 = load float, float* %op3
+	ld.d $t0, $fp, -44
+	fld.s $ft0, $t0, 0
+	fst.s $ft0, $fp, -88
+# %op12 = sitofp i32 %op10 to float
+	ld.w $t0, $fp, -84
+	movgr2fr.w $ft0, $t0
+	ffint.s.w $ft0, $ft0
+	fst.s $ft0, $fp, -92
+# %op13 = fmul float %op12, %op11
+	fld.s $ft0, $fp, -92
+	fld.s $ft1, $fp, -88
+	fmul.s $ft2, $ft0, $ft1
+	fst.s $ft2, $fp, -96
+# %op14 = fsub float %op9, %op13
+	fld.s $ft0, $fp, -80
+	fld.s $ft1, $fp, -96
+	fsub.s $ft2, $ft0, $ft1
+	fst.s $ft2, $fp, -100
+# ret float %op14
+	fld.s $fa0, $fp, -100
+	b mod_exit
+mod_exit:
+	addi.d $sp, $sp, 112
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -64
+.main_label_entry:
+# %op0 = alloca float
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# %op1 = alloca float
+	addi.d $t0, $fp, -40
+	st.d $t0, $fp, -36
+# store float 0x4026666660000000, float* %op0
+	ld.d $t0, $fp, -24
+	lu12i.w $t8, 267059
+	ori $t8, $t8, 819
+	movgr2fr.w $ft0, $t8
+	fst.s $ft0, $t0, 0
+# store float 0x40019999a0000000, float* %op1
+	ld.d $t0, $fp, -36
+	lu12i.w $t8, 262348
+	ori $t8, $t8, 3277
+	movgr2fr.w $ft0, $t8
+	fst.s $ft0, $t0, 0
+# %op2 = load float, float* %op0
+	ld.d $t0, $fp, -24
+	fld.s $ft0, $t0, 0
+	fst.s $ft0, $fp, -44
+# %op3 = load float, float* %op1
+	ld.d $t0, $fp, -36
+	fld.s $ft0, $t0, 0
+	fst.s $ft0, $fp, -48
+# %op4 = call float @mod(float %op2, float %op3)
+	fld.s $fa0, $fp, -44
+	fld.s $fa1, $fp, -48
+	bl mod
+	fst.s $fa0, $fp, -52
+# call void @outputFloat(float %op4)
+	fld.s $fa0, $fp, -52
+	bl outputFloat
+# ret i32 0
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 64
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/11-funcall_chain.out

+210

tests/3-codegen/autogen/output/11-funcall_chain.s

+	.text
+	.globl addone
+	.type addone, @function
+addone:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -48
+	st.w $a0, $fp, -20
+.addone_label_entry:
+# %op1 = alloca i32
+	addi.d $t0, $fp, -32
+	st.d $t0, $fp, -28
+# store i32 %arg0, i32* %op1
+	ld.d $t0, $fp, -28
+	ld.w $t1, $fp, -20
+	st.w $t1, $t0, 0
+# %op2 = load i32, i32* %op1
+	ld.d $t0, $fp, -28
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -36
+# %op3 = add i32 %op2, 1
+	ld.w $t0, $fp, -36
+	addi.w $t1, $zero, 1
+	add.w $t2, $t0, $t1
+	st.w $t2, $fp, -40
+# ret i32 %op3
+	ld.w $a0, $fp, -40
+	b addone_exit
+addone_exit:
+	addi.d $sp, $sp, 48
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -48
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# %op1 = call i32 @addone(i32 1230)
+	addi.w $a0, $zero, 1230
+	bl addone
+	st.w $a0, $fp, -32
+# %op2 = call i32 @addone(i32 %op1)
+	ld.w $a0, $fp, -32
+	bl addone
+	st.w $a0, $fp, -36
+# %op3 = call i32 @addone(i32 %op2)
+	ld.w $a0, $fp, -36
+	bl addone
+	st.w $a0, $fp, -40
+# %op4 = call i32 @addone(i32 %op3)
+	ld.w $a0, $fp, -40
+	bl addone
+	st.w $a0, $fp, -44
+# store i32 %op4, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t1, $fp, -44
+	st.w $t1, $t0, 0
+# %op5 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -48
+# ret i32 %op5
+	ld.w $a0, $fp, -48
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 48
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/12-funcall_recursion.out

+0

tests/3-codegen/autogen/output/12-funcall_recursion.s

+	.text
+	.globl factorial
+	.type factorial, @function
+factorial:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -64
+	st.w $a0, $fp, -20
+.factorial_label_entry:
+# %op1 = alloca i32
+	addi.d $t0, $fp, -32
+	st.d $t0, $fp, -28
+# store i32 %arg0, i32* %op1
+	ld.d $t0, $fp, -28
+	ld.w $t1, $fp, -20
+	st.w $t1, $t0, 0
+# %op2 = load i32, i32* %op1
+	ld.d $t0, $fp, -28
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -36
+# %op3 = icmp eq i32 %op2, 0
+	ld.w $t0, $fp, -36
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltui $t2, $t2, 1
+	st.b $t2, $fp, -37
+# %op4 = zext i1 %op3 to i32
+	ld.b $t0, $fp, -37
+	bstrpick.w $t0, $t0, 0, 0
+	st.w $t0, $fp, -41
+# %op5 = icmp ne i32 %op4, 0
+	ld.w $t0, $fp, -41
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -42
+# br i1 %op5, label %label6, label %label8
+	ld.b $t0, $fp, -42
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .factorial_label6
+	b .factorial_label8
+.factorial_label6:
+# ret i32 1
+	addi.w $a0, $zero, 1
+	b factorial_exit
+.factorial_label7:
+# ret i32 0
+	addi.w $a0, $zero, 0
+	b factorial_exit
+.factorial_label8:
+# %op9 = load i32, i32* %op1
+	ld.d $t0, $fp, -28
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -46
+# %op10 = load i32, i32* %op1
+	ld.d $t0, $fp, -28
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -50
+# %op11 = sub i32 %op10, 1
+	ld.w $t0, $fp, -50
+	addi.w $t1, $zero, 1
+	sub.w $t2, $t0, $t1
+	st.w $t2, $fp, -54
+# %op12 = call i32 @factorial(i32 %op11)
+	ld.w $a0, $fp, -54
+	bl factorial
+	st.w $a0, $fp, -58
+# %op13 = mul i32 %op9, %op12
+	ld.w $t0, $fp, -46
+	ld.w $t1, $fp, -58
+	mul.w $t2, $t0, $t1
+	st.w $t2, $fp, -62
+# ret i32 %op13
+	ld.w $a0, $fp, -62
+	b factorial_exit
+factorial_exit:
+	addi.d $sp, $sp, 64
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -48
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# %op1 = call i32 @factorial(i32 10)
+	addi.w $a0, $zero, 10
+	bl factorial
+	st.w $a0, $fp, -32
+# store i32 %op1, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t1, $fp, -32
+	st.w $t1, $t0, 0
+# %op2 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -36
+# ret i32 %op2
+	ld.w $a0, $fp, -36
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 48
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/12-global.ll

+; ModuleID = 'cminus'
+source_filename = "/code/compiler/24.ta/tests/3-codegen/autogen/testcases/12-global.cminus"
+
+@seed = global i32 zeroinitializer
+declare i32 @input()
+
+declare void @output(i32)
+
+declare void @outputFloat(float)
+
+declare void @neg_idx_except()
+
+define i32 @randomLCG() {
+label_entry:
+  %op0 = load i32, i32* @seed
+  %op1 = mul i32 %op0, 1103515245
+  %op2 = add i32 %op1, 12345
+  store i32 %op2, i32* @seed
+  %op3 = load i32, i32* @seed
+  ret i32 %op3
+}
+define i32 @randBin() {
+label_entry:
+  %op0 = call i32 @randomLCG()
+  %op1 = icmp sgt i32 %op0, 0
+  %op2 = zext i1 %op1 to i32
+  %op3 = icmp ne i32 %op2, 0
+  br i1 %op3, label %label4, label %label6
+label4:                                                ; preds = %label_entry
+  ret i32 1
+label5:
+  ret i32 0
+label6:                                                ; preds = %label_entry
+  ret i32 0
+}
+define i32 @returnToZeroSteps() {
+label_entry:
+  %op0 = alloca i32
+  %op1 = alloca i32
+  store i32 0, i32* %op0
+  store i32 0, i32* %op1
+  br label %label2
+label2:                                                ; preds = %label_entry, %label26
+  %op3 = load i32, i32* %op1
+  %op4 = icmp slt i32 %op3, 20
+  %op5 = zext i1 %op4 to i32
+  %op6 = icmp ne i32 %op5, 0
+  br i1 %op6, label %label7, label %label10
+label7:                                                ; preds = %label2
+  %op8 = call i32 @randBin()
+  %op9 = icmp ne i32 %op8, 0
+  br i1 %op9, label %label11, label %label21
+label10:                                                ; preds = %label2
+  ret i32 20
+label11:                                                ; preds = %label7
+  %op12 = load i32, i32* %op0
+  %op13 = add i32 %op12, 1
+  store i32 %op13, i32* %op0
+  br label %label14
+label14:                                                ; preds = %label11, %label21
+  %op15 = load i32, i32* %op1
+  %op16 = add i32 %op15, 1
+  store i32 %op16, i32* %op1
+  %op17 = load i32, i32* %op0
+  %op18 = icmp eq i32 %op17, 0
+  %op19 = zext i1 %op18 to i32
+  %op20 = icmp ne i32 %op19, 0
+  br i1 %op20, label %label24, label %label26
+label21:                                                ; preds = %label7
+  %op22 = load i32, i32* %op0
+  %op23 = sub i32 %op22, 1
+  store i32 %op23, i32* %op0
+  br label %label14
+label24:                                                ; preds = %label14
+  %op25 = load i32, i32* %op1
+  ret i32 %op25
+label26:                                                ; preds = %label14
+  br label %label2
+}
+define i32 @main() {
+label_entry:
+  %op0 = alloca i32
+  store i32 0, i32* %op0
+  store i32 3407, i32* @seed
+  br label %label1
+label1:                                                ; preds = %label_entry, %label6
+  %op2 = load i32, i32* %op0
+  %op3 = icmp slt i32 %op2, 20
+  %op4 = zext i1 %op3 to i32
+  %op5 = icmp ne i32 %op4, 0
+  br i1 %op5, label %label6, label %label10
+label6:                                                ; preds = %label1
+  %op7 = call i32 @returnToZeroSteps()
+  call void @output(i32 %op7)
+  %op8 = load i32, i32* %op0
+  %op9 = add i32 %op8, 1
+  store i32 %op9, i32* %op0
+  br label %label1
+label10:                                                ; preds = %label1
+  ret i32 0
+}

tests/3-codegen/autogen/output/12-global.out

+4
+2
+2
+4
+8
+2
+2
+2
+2
+2
+6
+2
+10
+8
+4
+2
+20
+2
+2
+8
+0

tests/3-codegen/autogen/output/12-global.s

+# Global variables
+	.text
+	.section .bss, "aw", @nobits
+	.globl seed
+	.type seed, @object
+	.size seed, 4
+seed:
+	.space 4
+	.text
+	.globl randomLCG
+	.type randomLCG, @function
+randomLCG:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -32
+.randomLCG_label_entry:
+# %op0 = load i32, i32* @seed
+	la.local $t0, seed
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -20
+# %op1 = mul i32 %op0, 1103515245
+	ld.w $t0, $fp, -20
+	lu12i.w $t1, 269412
+	ori $t1, $t1, 3693
+	mul.w $t2, $t0, $t1
+	st.w $t2, $fp, -24
+# %op2 = add i32 %op1, 12345
+	ld.w $t0, $fp, -24
+	lu12i.w $t1, 3
+	ori $t1, $t1, 57
+	add.w $t2, $t0, $t1
+	st.w $t2, $fp, -28
+# store i32 %op2, i32* @seed
+	la.local $t0, seed
+	ld.w $t1, $fp, -28
+	st.w $t1, $t0, 0
+# %op3 = load i32, i32* @seed
+	la.local $t0, seed
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -32
+# ret i32 %op3
+	ld.w $a0, $fp, -32
+	b randomLCG_exit
+randomLCG_exit:
+	addi.d $sp, $sp, 32
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra
+	.globl randBin
+	.type randBin, @function
+randBin:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -32
+.randBin_label_entry:
+# %op0 = call i32 @randomLCG()
+	bl randomLCG
+	st.w $a0, $fp, -20
+# %op1 = icmp sgt i32 %op0, 0
+	ld.w $t0, $fp, -20
+	addi.w $t1, $zero, 0
+	slt $t2, $t1, $t0
+	st.b $t2, $fp, -21
+# %op2 = zext i1 %op1 to i32
+	ld.b $t0, $fp, -21
+	bstrpick.w $t0, $t0, 0, 0
+	st.w $t0, $fp, -25
+# %op3 = icmp ne i32 %op2, 0
+	ld.w $t0, $fp, -25
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -26
+# br i1 %op3, label %label4, label %label6
+	ld.b $t0, $fp, -26
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .randBin_label4
+	b .randBin_label6
+.randBin_label4:
+# ret i32 1
+	addi.w $a0, $zero, 1
+	b randBin_exit
+.randBin_label5:
+# ret i32 0
+	addi.w $a0, $zero, 0
+	b randBin_exit
+.randBin_label6:
+# ret i32 0
+	addi.w $a0, $zero, 0
+	b randBin_exit
+randBin_exit:
+	addi.d $sp, $sp, 32
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra
+	.globl returnToZeroSteps
+	.type returnToZeroSteps, @function
+returnToZeroSteps:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -96
+.returnToZeroSteps_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# %op1 = alloca i32
+	addi.d $t0, $fp, -40
+	st.d $t0, $fp, -36
+# store i32 0, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 0
+	st.w $t1, $t0, 0
+# store i32 0, i32* %op1
+	ld.d $t0, $fp, -36
+	addi.w $t1, $zero, 0
+	st.w $t1, $t0, 0
+# br label %label2
+	b .returnToZeroSteps_label2
+.returnToZeroSteps_label2:
+# %op3 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -44
+# %op4 = icmp slt i32 %op3, 20
+	ld.w $t0, $fp, -44
+	addi.w $t1, $zero, 20
+	slt $t2, $t0, $t1
+	st.b $t2, $fp, -45
+# %op5 = zext i1 %op4 to i32
+	ld.b $t0, $fp, -45
+	bstrpick.w $t0, $t0, 0, 0
+	st.w $t0, $fp, -49
+# %op6 = icmp ne i32 %op5, 0
+	ld.w $t0, $fp, -49
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -50
+# br i1 %op6, label %label7, label %label10
+	ld.b $t0, $fp, -50
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .returnToZeroSteps_label7
+	b .returnToZeroSteps_label10
+.returnToZeroSteps_label7:
+# %op8 = call i32 @randBin()
+	bl randBin
+	st.w $a0, $fp, -54
+# %op9 = icmp ne i32 %op8, 0
+	ld.w $t0, $fp, -54
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -55
+# br i1 %op9, label %label11, label %label21
+	ld.b $t0, $fp, -55
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .returnToZeroSteps_label11
+	b .returnToZeroSteps_label21
+.returnToZeroSteps_label10:
+# ret i32 20
+	addi.w $a0, $zero, 20
+	b returnToZeroSteps_exit
+.returnToZeroSteps_label11:
+# %op12 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -59
+# %op13 = add i32 %op12, 1
+	ld.w $t0, $fp, -59
+	addi.w $t1, $zero, 1
+	add.w $t2, $t0, $t1
+	st.w $t2, $fp, -63
+# store i32 %op13, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t1, $fp, -63
+	st.w $t1, $t0, 0
+# br label %label14
+	b .returnToZeroSteps_label14
+.returnToZeroSteps_label14:
+# %op15 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -67
+# %op16 = add i32 %op15, 1
+	ld.w $t0, $fp, -67
+	addi.w $t1, $zero, 1
+	add.w $t2, $t0, $t1
+	st.w $t2, $fp, -71
+# store i32 %op16, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t1, $fp, -71
+	st.w $t1, $t0, 0
+# %op17 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -75
+# %op18 = icmp eq i32 %op17, 0
+	ld.w $t0, $fp, -75
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltui $t2, $t2, 1
+	st.b $t2, $fp, -76
+# %op19 = zext i1 %op18 to i32
+	ld.b $t0, $fp, -76
+	bstrpick.w $t0, $t0, 0, 0
+	st.w $t0, $fp, -80
+# %op20 = icmp ne i32 %op19, 0
+	ld.w $t0, $fp, -80
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -81
+# br i1 %op20, label %label24, label %label26
+	ld.b $t0, $fp, -81
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .returnToZeroSteps_label24
+	b .returnToZeroSteps_label26
+.returnToZeroSteps_label21:
+# %op22 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -85
+# %op23 = sub i32 %op22, 1
+	ld.w $t0, $fp, -85
+	addi.w $t1, $zero, 1
+	sub.w $t2, $t0, $t1
+	st.w $t2, $fp, -89
+# store i32 %op23, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t1, $fp, -89
+	st.w $t1, $t0, 0
+# br label %label14
+	b .returnToZeroSteps_label14
+.returnToZeroSteps_label24:
+# %op25 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -93
+# ret i32 %op25
+	ld.w $a0, $fp, -93
+	b returnToZeroSteps_exit
+.returnToZeroSteps_label26:
+# br label %label2
+	b .returnToZeroSteps_label2
+returnToZeroSteps_exit:
+	addi.d $sp, $sp, 96
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -64
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# store i32 0, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 0
+	st.w $t1, $t0, 0
+# store i32 3407, i32* @seed
+	la.local $t0, seed
+	lu12i.w $t1, 0
+	ori $t1, $t1, 3407
+	st.w $t1, $t0, 0
+# br label %label1
+	b .main_label1
+.main_label1:
+# %op2 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -32
+# %op3 = icmp slt i32 %op2, 20
+	ld.w $t0, $fp, -32
+	addi.w $t1, $zero, 20
+	slt $t2, $t0, $t1
+	st.b $t2, $fp, -33
+# %op4 = zext i1 %op3 to i32
+	ld.b $t0, $fp, -33
+	bstrpick.w $t0, $t0, 0, 0
+	st.w $t0, $fp, -37
+# %op5 = icmp ne i32 %op4, 0
+	ld.w $t0, $fp, -37
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -38
+# br i1 %op5, label %label6, label %label10
+	ld.b $t0, $fp, -38
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label6
+	b .main_label10
+.main_label6:
+# %op7 = call i32 @returnToZeroSteps()
+	bl returnToZeroSteps
+	st.w $a0, $fp, -42
+# call void @output(i32 %op7)
+	ld.w $a0, $fp, -42
+	bl output
+# %op8 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -46
+# %op9 = add i32 %op8, 1
+	ld.w $t0, $fp, -46
+	addi.w $t1, $zero, 1
+	add.w $t2, $t0, $t1
+	st.w $t2, $fp, -50
+# store i32 %op9, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t1, $fp, -50
+	st.w $t1, $t0, 0
+# br label %label1
+	b .main_label1
+.main_label10:
+# ret i32 0
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 64
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/13-complex.out

+15
+0

tests/3-codegen/autogen/output/13-if_stmt.out

+0

tests/3-codegen/autogen/output/13-if_stmt.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -48
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# store i32 2, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 2
+	st.w $t1, $t0, 0
+# %op1 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -32
+# %op2 = icmp ne i32 %op1, 0
+	ld.w $t0, $fp, -32
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -33
+# br i1 %op2, label %label3, label %label4
+	ld.b $t0, $fp, -33
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label3
+	b .main_label4
+.main_label3:
+# store i32 3, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 3
+	st.w $t1, $t0, 0
+# br label %label4
+	b .main_label4
+.main_label4:
+# store i32 4, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 4
+	st.w $t1, $t0, 0
+# ret void
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 48
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/14-while_stmt.out

+0

tests/3-codegen/autogen/output/14-while_stmt.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -48
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# store i32 10, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 10
+	st.w $t1, $t0, 0
+# br label %label1
+	b .main_label1
+.main_label1:
+# %op2 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -32
+# %op3 = icmp ne i32 %op2, 0
+	ld.w $t0, $fp, -32
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -33
+# br i1 %op3, label %label4, label %label7
+	ld.b $t0, $fp, -33
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label4
+	b .main_label7
+.main_label4:
+# %op5 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -37
+# %op6 = sub i32 %op5, 1
+	ld.w $t0, $fp, -37
+	addi.w $t1, $zero, 1
+	sub.w $t2, $t0, $t1
+	st.w $t2, $fp, -41
+# store i32 %op6, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t1, $fp, -41
+	st.w $t1, $t0, 0
+# br label %label1
+	b .main_label1
+.main_label7:
+# ret void
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 48
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/15-if_while.out

+45

tests/3-codegen/autogen/output/15-if_while.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -112
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# %op1 = alloca i32
+	addi.d $t0, $fp, -40
+	st.d $t0, $fp, -36
+# %op2 = alloca i32
+	addi.d $t0, $fp, -52
+	st.d $t0, $fp, -48
+# store i32 0, i32* %op1
+	ld.d $t0, $fp, -36
+	addi.w $t1, $zero, 0
+	st.w $t1, $t0, 0
+# store i32 0, i32* %op2
+	ld.d $t0, $fp, -48
+	addi.w $t1, $zero, 0
+	st.w $t1, $t0, 0
+# store i32 10, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 10
+	st.w $t1, $t0, 0
+# br label %label3
+	b .main_label3
+.main_label3:
+# %op4 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -56
+# %op5 = icmp ne i32 %op4, 0
+	ld.w $t0, $fp, -56
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -57
+# br i1 %op5, label %label6, label %label13
+	ld.b $t0, $fp, -57
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label6
+	b .main_label13
+.main_label6:
+# %op7 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -61
+# %op8 = sub i32 %op7, 1
+	ld.w $t0, $fp, -61
+	addi.w $t1, $zero, 1
+	sub.w $t2, $t0, $t1
+	st.w $t2, $fp, -65
+# store i32 %op8, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t1, $fp, -65
+	st.w $t1, $t0, 0
+# %op9 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -69
+# %op10 = icmp slt i32 %op9, 5
+	ld.w $t0, $fp, -69
+	addi.w $t1, $zero, 5
+	slt $t2, $t0, $t1
+	st.b $t2, $fp, -70
+# %op11 = zext i1 %op10 to i32
+	ld.b $t0, $fp, -70
+	bstrpick.w $t0, $t0, 0, 0
+	st.w $t0, $fp, -74
+# %op12 = icmp ne i32 %op11, 0
+	ld.w $t0, $fp, -74
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -75
+# br i1 %op12, label %label17, label %label22
+	ld.b $t0, $fp, -75
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label17
+	b .main_label22
+.main_label13:
+# %op14 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -79
+# %op15 = load i32, i32* %op2
+	ld.d $t0, $fp, -48
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -83
+# %op16 = add i32 %op14, %op15
+	ld.w $t0, $fp, -79
+	ld.w $t1, $fp, -83
+	add.w $t2, $t0, $t1
+	st.w $t2, $fp, -87
+# ret i32 %op16
+	ld.w $a0, $fp, -87
+	b main_exit
+.main_label17:
+# %op18 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -91
+# %op19 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -95
+# %op20 = add i32 %op18, %op19
+	ld.w $t0, $fp, -91
+	ld.w $t1, $fp, -95
+	add.w $t2, $t0, $t1
+	st.w $t2, $fp, -99
+# store i32 %op20, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t1, $fp, -99
+	st.w $t1, $t0, 0
+# br label %label21
+	b .main_label21
+.main_label21:
+# br label %label3
+	b .main_label3
+.main_label22:
+# %op23 = load i32, i32* %op2
+	ld.d $t0, $fp, -48
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -103
+# %op24 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -107
+# %op25 = add i32 %op23, %op24
+	ld.w $t0, $fp, -103
+	ld.w $t1, $fp, -107
+	add.w $t2, $t0, $t1
+	st.w $t2, $fp, -111
+# store i32 %op25, i32* %op2
+	ld.d $t0, $fp, -48
+	ld.w $t1, $fp, -111
+	st.w $t1, $t0, 0
+# br label %label21
+	b .main_label21
+main_exit:
+	addi.d $sp, $sp, 112
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/16-if_chain.out

+3

tests/3-codegen/autogen/output/16-if_chain.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -80
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# %op1 = alloca i32
+	addi.d $t0, $fp, -40
+	st.d $t0, $fp, -36
+# %op2 = alloca i32
+	addi.d $t0, $fp, -52
+	st.d $t0, $fp, -48
+# store i32 0, i32* %op2
+	ld.d $t0, $fp, -48
+	addi.w $t1, $zero, 0
+	st.w $t1, $t0, 0
+# store i32 2, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 2
+	st.w $t1, $t0, 0
+# store i32 1, i32* %op1
+	ld.d $t0, $fp, -36
+	addi.w $t1, $zero, 1
+	st.w $t1, $t0, 0
+# %op3 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -56
+# %op4 = icmp ne i32 %op3, 0
+	ld.w $t0, $fp, -56
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -57
+# br i1 %op4, label %label5, label %label8
+	ld.b $t0, $fp, -57
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label5
+	b .main_label8
+.main_label5:
+# %op6 = load i32, i32* %op2
+	ld.d $t0, $fp, -48
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -61
+# %op7 = icmp ne i32 %op6, 0
+	ld.w $t0, $fp, -61
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -62
+# br i1 %op7, label %label10, label %label12
+	ld.b $t0, $fp, -62
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label10
+	b .main_label12
+.main_label8:
+# %op9 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -66
+# ret i32 %op9
+	ld.w $a0, $fp, -66
+	b main_exit
+.main_label10:
+# store i32 4, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 4
+	st.w $t1, $t0, 0
+# br label %label11
+	b .main_label11
+.main_label11:
+# br label %label8
+	b .main_label8
+.main_label12:
+# store i32 3, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 3
+	st.w $t1, $t0, 0
+# br label %label11
+	b .main_label11
+main_exit:
+	addi.d $sp, $sp, 80
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/17-while_chain.out

+0

tests/3-codegen/autogen/output/17-while_chain.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -96
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# %op1 = alloca i32
+	addi.d $t0, $fp, -40
+	st.d $t0, $fp, -36
+# store i32 10, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 10
+	st.w $t1, $t0, 0
+# br label %label2
+	b .main_label2
+.main_label2:
+# %op3 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -44
+# %op4 = icmp ne i32 %op3, 0
+	ld.w $t0, $fp, -44
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -45
+# br i1 %op4, label %label5, label %label9
+	ld.b $t0, $fp, -45
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label5
+	b .main_label9
+.main_label5:
+# %op6 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -49
+# %op7 = sub i32 %op6, 1
+	ld.w $t0, $fp, -49
+	addi.w $t1, $zero, 1
+	sub.w $t2, $t0, $t1
+	st.w $t2, $fp, -53
+# store i32 %op7, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t1, $fp, -53
+	st.w $t1, $t0, 0
+# %op8 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -57
+# store i32 %op8, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t1, $fp, -57
+	st.w $t1, $t0, 0
+# br label %label13
+	b .main_label13
+.main_label9:
+# %op10 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -61
+# %op11 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -65
+# %op12 = add i32 %op10, %op11
+	ld.w $t0, $fp, -61
+	ld.w $t1, $fp, -65
+	add.w $t2, $t0, $t1
+	st.w $t2, $fp, -69
+# ret i32 %op12
+	ld.w $a0, $fp, -69
+	b main_exit
+.main_label13:
+# %op14 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -73
+# %op15 = icmp ne i32 %op14, 0
+	ld.w $t0, $fp, -73
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -74
+# br i1 %op15, label %label16, label %label19
+	ld.b $t0, $fp, -74
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label16
+	b .main_label19
+.main_label16:
+# %op17 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -78
+# %op18 = sub i32 %op17, 1
+	ld.w $t0, $fp, -78
+	addi.w $t1, $zero, 1
+	sub.w $t2, $t0, $t1
+	st.w $t2, $fp, -82
+# store i32 %op18, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t1, $fp, -82
+	st.w $t1, $t0, 0
+# br label %label13
+	b .main_label13
+.main_label19:
+# br label %label2
+	b .main_label2
+main_exit:
+	addi.d $sp, $sp, 96
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/18-global_var.out

+10

tests/3-codegen/autogen/output/18-global_var.s

+# Global variables
+	.text
+	.section .bss, "aw", @nobits
+	.globl a
+	.type a, @object
+	.size a, 4
+a:
+	.space 4
+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -32
+.main_label_entry:
+# store i32 10, i32* @a
+	la.local $t0, a
+	addi.w $t1, $zero, 10
+	st.w $t1, $t0, 0
+# %op0 = load i32, i32* @a
+	la.local $t0, a
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -20
+# ret i32 %op0
+	ld.w $a0, $fp, -20
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 32
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/19-global_local_var.out

+20

tests/3-codegen/autogen/output/19-global_local_var.s

+# Global variables
+	.text
+	.section .bss, "aw", @nobits
+	.globl a
+	.type a, @object
+	.size a, 4
+a:
+	.space 4
+	.text
+	.globl GlobalAssign
+	.type GlobalAssign, @function
+GlobalAssign:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -16
+.GlobalAssign_label_entry:
+# store i32 10, i32* @a
+	la.local $t0, a
+	addi.w $t1, $zero, 10
+	st.w $t1, $t0, 0
+# ret void
+	addi.w $a0, $zero, 0
+	b GlobalAssign_exit
+GlobalAssign_exit:
+	addi.d $sp, $sp, 16
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -32
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# call void @GlobalAssign()
+	bl GlobalAssign
+# store i32 20, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 20
+	st.w $t1, $t0, 0
+# %op1 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -32
+# ret i32 %op1
+	ld.w $a0, $fp, -32
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 32
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/2-calculate.ll

+; ModuleID = 'cminus'
+source_filename = "/code/compiler/24.ta/tests/3-codegen/autogen/testcases/2-calculate.cminus"
+
+declare i32 @input()
+
+declare void @output(i32)
+
+declare void @outputFloat(float)
+
+declare void @neg_idx_except()
+
+define i32 @main() {
+label_entry:
+  %op0 = alloca i32
+  %op1 = alloca i32
+  %op2 = alloca i32
+  store i32 23, i32* %op0
+  store i32 25, i32* %op1
+  store i32 4, i32* %op2
+  %op3 = load i32, i32* %op0
+  %op4 = load i32, i32* %op1
+  %op5 = load i32, i32* %op2
+  %op6 = mul i32 %op4, %op5
+  %op7 = add i32 %op3, %op6
+  ret i32 %op7
+}

tests/3-codegen/autogen/output/2-calculate.out

+123

tests/3-codegen/autogen/output/2-calculate.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -80
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# %op1 = alloca i32
+	addi.d $t0, $fp, -40
+	st.d $t0, $fp, -36
+# %op2 = alloca i32
+	addi.d $t0, $fp, -52
+	st.d $t0, $fp, -48
+# store i32 23, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 23
+	st.w $t1, $t0, 0
+# store i32 25, i32* %op1
+	ld.d $t0, $fp, -36
+	addi.w $t1, $zero, 25
+	st.w $t1, $t0, 0
+# store i32 4, i32* %op2
+	ld.d $t0, $fp, -48
+	addi.w $t1, $zero, 4
+	st.w $t1, $t0, 0
+# %op3 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -56
+# %op4 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -60
+# %op5 = load i32, i32* %op2
+	ld.d $t0, $fp, -48
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -64
+# %op6 = mul i32 %op4, %op5
+	ld.w $t0, $fp, -60
+	ld.w $t1, $fp, -64
+	mul.w $t2, $t0, $t1
+	st.w $t2, $fp, -68
+# %op7 = add i32 %op3, %op6
+	ld.w $t0, $fp, -56
+	ld.w $t1, $fp, -68
+	add.w $t2, $t0, $t1
+	st.w $t2, $fp, -72
+# ret i32 %op7
+	ld.w $a0, $fp, -72
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 80
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/2-decl_int.out

+0

tests/3-codegen/autogen/output/2-decl_int.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -32
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# ret void
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 32
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/20-gcd_array.out

+18

tests/3-codegen/autogen/output/21-comment.out

+0

tests/3-codegen/autogen/output/21-comment.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -16
+.main_label_entry:
+# ret void
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 16
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/3-decl_float.out

+0

tests/3-codegen/autogen/output/3-decl_float.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -32
+.main_label_entry:
+# %op0 = alloca float
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# ret void
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 32
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/3-output.ll

+; ModuleID = 'cminus'
+source_filename = "/code/compiler/24.ta/tests/3-codegen/autogen/testcases/3-output.cminus"
+
+declare i32 @input()
+
+declare void @output(i32)
+
+declare void @outputFloat(float)
+
+declare void @neg_idx_except()
+
+define i32 @main() {
+label_entry:
+  call void @output(i32 11)
+  call void @output(i32 22222)
+  ret i32 0
+}

tests/3-codegen/autogen/output/3-output.out

+11
+22222
+0

tests/3-codegen/autogen/output/3-output.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -16
+.main_label_entry:
+# call void @output(i32 11)
+	addi.w $a0, $zero, 11
+	bl output
+# call void @output(i32 22222)
+	lu12i.w $a0, 5
+	ori $a0, $a0, 1742
+	bl output
+# ret i32 0
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 16
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/4-decl_int_array.out

+0

tests/3-codegen/autogen/output/4-decl_int_array.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -64
+.main_label_entry:
+# %op0 = alloca [10 x i32]
+	addi.d $t0, $fp, -64
+	st.d $t0, $fp, -24
+# ret void
+	addi.w $a0, $zero, 0
+	b main_exit
+main_exit:
+	addi.d $sp, $sp, 64
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/4-if.ll

+; ModuleID = 'cminus'
+source_filename = "/code/compiler/24.ta/tests/3-codegen/autogen/testcases/4-if.cminus"
+
+declare i32 @input()
+
+declare void @output(i32)
+
+declare void @outputFloat(float)
+
+declare void @neg_idx_except()
+
+define i32 @main() {
+label_entry:
+  %op0 = alloca i32
+  %op1 = alloca i32
+  %op2 = alloca i32
+  store i32 11, i32* %op0
+  store i32 22, i32* %op1
+  store i32 33, i32* %op2
+  %op3 = load i32, i32* %op0
+  %op4 = load i32, i32* %op1
+  %op5 = icmp sgt i32 %op3, %op4
+  %op6 = zext i1 %op5 to i32
+  %op7 = icmp ne i32 %op6, 0
+  br i1 %op7, label %label8, label %label15
+label8:                                                ; preds = %label_entry
+  %op9 = load i32, i32* %op0
+  %op10 = load i32, i32* %op2
+  %op11 = icmp sgt i32 %op9, %op10
+  %op12 = zext i1 %op11 to i32
+  %op13 = icmp ne i32 %op12, 0
+  br i1 %op13, label %label21, label %label24
+label14:                                                ; preds = %label23, %label28
+  ret i32 0
+label15:                                                ; preds = %label_entry
+  %op16 = load i32, i32* %op2
+  %op17 = load i32, i32* %op1
+  %op18 = icmp slt i32 %op16, %op17
+  %op19 = zext i1 %op18 to i32
+  %op20 = icmp ne i32 %op19, 0
+  br i1 %op20, label %label26, label %label29
+label21:                                                ; preds = %label8
+  %op22 = load i32, i32* %op0
+  call void @output(i32 %op22)
+  br label %label23
+label23:                                                ; preds = %label21, %label24
+  br label %label14
+label24:                                                ; preds = %label8
+  %op25 = load i32, i32* %op2
+  call void @output(i32 %op25)
+  br label %label23
+label26:                                                ; preds = %label15
+  %op27 = load i32, i32* %op1
+  call void @output(i32 %op27)
+  br label %label28
+label28:                                                ; preds = %label26, %label29
+  br label %label14
+label29:                                                ; preds = %label15
+  %op30 = load i32, i32* %op2
+  call void @output(i32 %op30)
+  br label %label28
+}

tests/3-codegen/autogen/output/4-if.out

+33
+0

tests/3-codegen/autogen/output/4-if.s

+	.text
+	.globl main
+	.type main, @function
+main:
+	st.d $ra, $sp, -8
+	st.d $fp, $sp, -16
+	addi.d $fp, $sp, 0
+	addi.d $sp, $sp, -112
+.main_label_entry:
+# %op0 = alloca i32
+	addi.d $t0, $fp, -28
+	st.d $t0, $fp, -24
+# %op1 = alloca i32
+	addi.d $t0, $fp, -40
+	st.d $t0, $fp, -36
+# %op2 = alloca i32
+	addi.d $t0, $fp, -52
+	st.d $t0, $fp, -48
+# store i32 11, i32* %op0
+	ld.d $t0, $fp, -24
+	addi.w $t1, $zero, 11
+	st.w $t1, $t0, 0
+# store i32 22, i32* %op1
+	ld.d $t0, $fp, -36
+	addi.w $t1, $zero, 22
+	st.w $t1, $t0, 0
+# store i32 33, i32* %op2
+	ld.d $t0, $fp, -48
+	addi.w $t1, $zero, 33
+	st.w $t1, $t0, 0
+# %op3 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -56
+# %op4 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -60
+# %op5 = icmp sgt i32 %op3, %op4
+	ld.w $t0, $fp, -56
+	ld.w $t1, $fp, -60
+	slt $t2, $t1, $t0
+	st.b $t2, $fp, -61
+# %op6 = zext i1 %op5 to i32
+	ld.b $t0, $fp, -61
+	bstrpick.w $t0, $t0, 0, 0
+	st.w $t0, $fp, -65
+# %op7 = icmp ne i32 %op6, 0
+	ld.w $t0, $fp, -65
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -66
+# br i1 %op7, label %label8, label %label15
+	ld.b $t0, $fp, -66
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label8
+	b .main_label15
+.main_label8:
+# %op9 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -70
+# %op10 = load i32, i32* %op2
+	ld.d $t0, $fp, -48
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -74
+# %op11 = icmp sgt i32 %op9, %op10
+	ld.w $t0, $fp, -70
+	ld.w $t1, $fp, -74
+	slt $t2, $t1, $t0
+	st.b $t2, $fp, -75
+# %op12 = zext i1 %op11 to i32
+	ld.b $t0, $fp, -75
+	bstrpick.w $t0, $t0, 0, 0
+	st.w $t0, $fp, -79
+# %op13 = icmp ne i32 %op12, 0
+	ld.w $t0, $fp, -79
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -80
+# br i1 %op13, label %label21, label %label24
+	ld.b $t0, $fp, -80
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label21
+	b .main_label24
+.main_label14:
+# ret i32 0
+	addi.w $a0, $zero, 0
+	b main_exit
+.main_label15:
+# %op16 = load i32, i32* %op2
+	ld.d $t0, $fp, -48
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -84
+# %op17 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -88
+# %op18 = icmp slt i32 %op16, %op17
+	ld.w $t0, $fp, -84
+	ld.w $t1, $fp, -88
+	slt $t2, $t0, $t1
+	st.b $t2, $fp, -89
+# %op19 = zext i1 %op18 to i32
+	ld.b $t0, $fp, -89
+	bstrpick.w $t0, $t0, 0, 0
+	st.w $t0, $fp, -93
+# %op20 = icmp ne i32 %op19, 0
+	ld.w $t0, $fp, -93
+	addi.w $t1, $zero, 0
+	xor $t2, $t0, $t1
+	sltu $t2, $zero, $t2
+	st.b $t2, $fp, -94
+# br i1 %op20, label %label26, label %label29
+	ld.b $t0, $fp, -94
+	bstrpick.d $t0, $t0, 0, 0
+	bne $t0, $zero, .main_label26
+	b .main_label29
+.main_label21:
+# %op22 = load i32, i32* %op0
+	ld.d $t0, $fp, -24
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -98
+# call void @output(i32 %op22)
+	ld.w $a0, $fp, -98
+	bl output
+# br label %label23
+	b .main_label23
+.main_label23:
+# br label %label14
+	b .main_label14
+.main_label24:
+# %op25 = load i32, i32* %op2
+	ld.d $t0, $fp, -48
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -102
+# call void @output(i32 %op25)
+	ld.w $a0, $fp, -102
+	bl output
+# br label %label23
+	b .main_label23
+.main_label26:
+# %op27 = load i32, i32* %op1
+	ld.d $t0, $fp, -36
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -106
+# call void @output(i32 %op27)
+	ld.w $a0, $fp, -106
+	bl output
+# br label %label28
+	b .main_label28
+.main_label28:
+# br label %label14
+	b .main_label14
+.main_label29:
+# %op30 = load i32, i32* %op2
+	ld.d $t0, $fp, -48
+	ld.w $t0, $t0, 0
+	st.w $t0, $fp, -110
+# call void @output(i32 %op30)
+	ld.w $a0, $fp, -110
+	bl output
+# br label %label28
+	b .main_label28
+main_exit:
+	addi.d $sp, $sp, 112
+	ld.d $ra, $sp, -8
+	ld.d $fp, $sp, -16
+	jr $ra

tests/3-codegen/autogen/output/5-decl_float_array.out

+0